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CS8129
CS8129
5V, 750mA Low Dropout Linear Regulator with Lower RESET Threshold
Description
The CS8129 is a precision 5V linear regulator capable of sourcing 750mA. The RESET threshold voltage has been lowered to 4.2V so that the regulator can be used with 4V microprocessors. The lower RESET threshold also permits operation under low battery conditions (5.5V plus a diode). The RESET Os delay time is externally programmed using a discrete RC network. During power up, or when the output goes out of regulation, RESET remains in the low state for the duration of the delay. This function is independent of the input voltage and will function correctly as long as the output voltage remains at or above 1V. Hysteresis is included in the Delay and the RESET comparators to improve noise immunity. A latching discharge circuit is used to discharge the delay capacitor when it is triggered by a brief fault condition. The regulator is protected against a variety of fault conditions: i.e. reverse battery, overvoltage, short circuit and thermal runaway conditions. The regulator is protected against voltage transients ranging from -50V to +40V. Short circuit current is limited to 1.2A (typ). The CS8129 is packaged in a 5 lead TO220 and a 16 lead surface mount package.
Features
s 5V +/- 3% Regulated Output s Low Dropout Voltage (0.6V @ 0.5A) s 750mA Output Current Capability s Reduced RESET Threshold for use with 4V Microprocessors s Externally Programmed RESET Delay s Fault Protection Reverse Battery 60V, -50V Peak Transient Voltage Short Circuit Thermal Shutdown
Block Diagram
VIN Over Voltage Shutdown VOUT PreRegulator Regulated Supply for Circuit Bias Bandgap Reference Charge Current Generator Thermal Shutdown
Package Options
16 Lead SOIC Wide
VIN NC
1
VOUT NC VOUT(SENSE) Gnd Gnd Gnd NC NC
Error Amplifier Anti-Saturation and Current Limit VOUTSENSE + + + -
NC Gnd Gnd RESET NC
Latching Discharge Delay Q + S R
Delay
5 Lead TO-220
VDISCHARGE Delay Comparator RESET
Gnd
1
1 VIN 2 RESET 3 Gnd 4 Delay 5 VOUT
Cherry Semiconductor Corporation 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 Email: info@cherry-semi.com Web Site: www.cherry-semi.com
Rev. 3/31/99
1
A
Company
CS8129
Absolute Maximum Ratings Input Operating Range..................................................................................................................................................-0.5 to 26V Power Dissipation.............................................................................................................................................Internally Limited Peak Transient Voltage (46V Load Dump @ 14V VIN) ...............................................................................................-50V, 60V Output Current .................................................................................................................................................Internally Limited ESD Susceptibility (Human Body Model)..............................................................................................................................4kV Junction Temperature .............................................................................................................................................-55C to 150C Storage Temperature...............................................................................................................................................-55C to 150C Lead Temperature Soldering Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260C peak Reflow (SMD styles only) ......................................................................................60 sec. max above 183C, 230C peak Electrical Characteristics: -40uC TA + 125uC, -40uC TJ +150uC, 6V VIN 26V, 5mA IOUT 500mA, R RESET = 4.7k1/2 to VOUT
unless otherwise noted* TEST CONDITIONS PARAMETER MIN TYP MAX UNIT
s
Output Stage (VOUT) Output Voltage Dropout Voltage Supply Current IOUT = 500mA IOUT 10mA IOUT 100mA IOUT 500mA 6V VIN 26V, IOUT = 50mA 50mA IOUT 500mA, VIN = 14V f = 120Hz, VIN = 7 to 17V, IOUT = 250mA 54 0.75 32 VOUT -0.6V, 101/2 Load Guaranteed by Design -15 150 -30 180 210 4.85 5.00 0.35 2 6 55 5 10 75 1.20 40 5.15 0.60 7 12 100 50 50 V V mA
Line Regulation Load Regulation Ripple Rejection Current Limit Overvoltage Shutdown Reverse Polarity Input Voltage DC Thermal Shutdown s RESET and Delay Functions Delay Charge Current RESET Threshold RESET Hysteresis Delay Threshold Delay Hysteresis
mV mV dB A V V C
VDELAY = 2V VOUT Increasing, VRT(ON) VOUT Decreasing, VRT(OFF) VRH=VRT(ON) - VRT(OFF) Charge, VDC(HI) Discharge, VDC(LO)
5 4.05 4.00 50 3.25 2.85 200
10 4.35 4.20 150 3.50 3.10 400 0.1 0 0.2
15 4.50 4.45 250 3.75 3.35 800 0.4 10 0.5 48
A V V mV V V mV V A V ms
RESET Output Voltage Low1V < VOUT < VRT(L) , 3k1/2 to VOUT RESET Output Leakage Delay Capacitor Discharge Voltage Delay Time VOUT > VRT(H) Current Discharge Latched OONO, VOUT > VRT CDELAY = 0.1F (Note 1) 16
32
* To observe safe operating junction temperatures, low duty cycle pulse testing is used in tests where applicable. Delay Time = CDelay x VDelay Threshold Charge I Charge = CDelay x 3.5 x 10 5 (typ)
Note 1: assuming ideal capacitor
2
CS8129
Package Lead Description
PACKAGE LEAD # LEAD SYMBOL FUNCTION
16L SOIC Wide 1 16 4, 5, 11, 12, 13 8 6 14
5L TO-220 1 5 3 4 2 N/A VIN VOUT Gnd Delay RESET VOUT(SENSE) Unregulated supply voltage to IC. Regulated 5V output. Ground connection. Timing capacitor for RESET function. CMOS/TTL compatible output lead. RESET goes low whenever VOUT drops below 6% of it's regulated value. Remote sensing of output voltage.
Typical Performance Characteristics
Quiescent Current vs Input Voltage over Temperature
55.0 50.0 45.0 40.0 35.0
ICQ (mA) Rload = 25W
Quiescent Current vs Input Voltage over Load Resistance
120.0 100.0 80.0
ICQ (mA) Room Temp. Rload = 6.67W
30.0 25.0 20.0 15.0 10.0 5.0 0.0
125uC
25uC
60.0 40.0 20.0 0.0
Rload = 10W
-40uC
Rload = 25W Rload = NO LOAD
0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
VIN (V)
0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
VIN (V)
Output Voltage vs Input Voltage over Temperature
Rload = 25W
VOUT vs. VIN over RLOAD
5.5 5.0 4.5 4.0 3.5
VOUT (V) Rload = 6.67W Room Temp.
5.5 5.0 4.5 4.0 3.5
VOUT (V)
Rload=251/2
3.0 2.5 2.0 1.5 1.0 0.5 0.0
3.0 2.5 2.0 1.5
Rload = NO LOAD Rload = 10W
125uC
25uC -40uC
1.0 0.5 0.0
0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
VIN (V)
0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0
VIN (V)
Line Regulation vs. Output Current
100 80
LINE REGULATION (mV) VIN 6-26V LOAD REGULATION (mV)
Load Regulation vs. Output Current
6 4 2 0 -2 -4 -6 -8 -10 -12 -14
VIN = 14V TEMP = 125uC TEMP = 25uC TEMP = -40uC
60 40 20 0 -20 -40 -60 -80 -100 0 100 200 300 400 500 600 700 800
OUTPUT CURRENT (mA) TEMP = 125uC TEMP = 25uC TEMP = -40uC
0
100
200
300
400
500
600
700
800
OUTPUT CURRENT (mA)
3
CS8129
Typical Performance Characteristics Continued
Dropout Voltage vs. Output Current Quiescent Current vs. Output Current
900
QUIESCENT CURRENT (mA)
100 90 80 70 60 50 40 30 20 10 0 0 100 200 300 400 500 600 700 800 0 100 200 300 400 500 600 700 800
OUTPUT CURRENT (mA) OUTPUT CURRENT (mA) VIN = 14V 25uC 125uC
800
DROPOUT VOLTAGE (mV)
700 600 500 400 300 200 100 0
-40uC 125uC 25uC
-40uC
Ripple Rejection
IOUT= 250mA
Output Capacitor ESR
103 102 101
ESR (ohms) COUT= 47/68mF Stable Region
90 80 70
REJECTION (dB) COUT= 10mF, ESR = 1 & 0.1mF, ESR = 0
60 50 40 30 20 10 0 100 101 102 103 104 105 106 107 108
FREQUENCY (Hz) COUT= 10mF, ESR = 10W COUT= 10mF, ESR = 1W
100 10-1 10 10
-2
COUT= 47mF COUT= 68mF
-3
10-4 100
101
102
103
Output Current (mA)
Test & Application Circuit
VIN
CIN* 100nF
VOUT
CS8129
Delay RESET
RRST 4.7kW
COUT** 10mF to 100mF
Gnd
Delay 0.1mF
*CIN required if regulator is far from the power source filter. **COUT required for stability.
4
CS8129
RESET Circuit Waveform
VOUT VRT(ON) VRT(OFF)
VRH
(1) = No Delay Capacitor (2) = With Delay Capacitor (3) = Max: RESET Voltage (1.0V)
RESET
(1) (2) VRL
(3)
tDelay Delay VDH VDC(HI) VDC(LO) VDIS
(2)
RESET Circuit Functional Description The CS8129 RESET function has hysteresis on both the reset and delay comparators, a latching Delay capacitor discharge circuit, and operates down to 1V. The RESET circuit output is an open collector type with ON and OFF parameters as specified. The RESET output NPN transistor is controlled by the two circuits described (see Block Diagram). put voltage is above VRT(ON). Otherwise, the Delay lead sinks current to ground (used to discharge the delay capacitor). The discharge current is latched ON when the output voltage is below VRT(OFF). The Delay capacitor is fully discharged anytime the output voltage falls out of regulation, even for a short period of time. This feature ensures a controlled RESET pulse is generated following detection of an error condition. The circuit allows the RESET output transistor to go to the OFF (open) state only when the voltage on the Delay lead is higher than VDC(HI). The Delay time for the RESET function is calculated from the formula: Delay time = CDelay x VDelay Threshold ICharge
x
Low Voltage Inhibit Circuit
This circuit monitors output voltage, and when output voltage is below the specified minimum causes the RESET output transistor to be in the ON (saturation) state. When the output voltage is above the specified level, this circuit permits the RESET output transistor to go into the OFF state if allowed by the RESET Delay circuit.
Reset Delay Circuit
Delay time = CDelay(F) x 3.2
10 5
This circuit provides a programmable (by external capacitor) delay on the RESET output lead. The Delay lead provides source current to the external delay capacitor only when the "Low Voltage Inhibit" circuit indicates that out-
If CDelay=0.1F, Delay time (ms)=32ms 50%: i.e. 16ms to 48ms. The tolerance of the capacitor must be taken into account to calculate the total variation in the delay time.
5
CS8129
Application Notes Stability Considerations The output or compensation capacitor helps determine three main characteristics of a linear regulator: start-up delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero ESR can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (-25C to -40C), both the value and ESR of the least expensive will vary considerably. The capacitor manufacturers data sheet usually provides this information. The value for the output capacitor COUT shown in the test and applications circuit should work for most applications, however it is not necessarily the optimized solution. To determine an acceptable value for COUT for a particular application, start with a tantalum capacitor of the recommended value and work towards a less expensive alternative part. Step 1: Place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature and monitor the outputs with an oscilloscope. A decade box connected in series with the capacitor will simulate the higher ESR of an aluminum capacitor. Leave the decade box outside the chamber, the small resistance added by the longer leads is negligible. Step 2: With the input voltage at its maximum value, increase the load current slowly from zero to full load while observing the output for any oscillations. If no oscillations are observed, the capacitor is large enough to ensure a stable design under steady state conditions. Step 3: Increase the ESR of the capacitor from zero using the decade box and vary the load current until oscillations appear. Record the values of load current and ESR that cause the greatest oscillation. This represents the worst case load conditions for the regulator at low temperature. Step 4: Maintain the worst case load conditions set in step 3 and vary the input voltage until the oscillations increase. This point represents the worst case input voltage conditions. Step 5: If the capacitor is adequate, repeat steps 3 and 4 with the next smaller valued capacitor. A smaller capacitor will usually cost less and occupy less board space. If the output oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger standard capacitor value. Step 6: Test the load transient response by switching in various loads at several frequencies to simulate its real working environment. Vary the ESR to reduce ringing. Step 7: Remove the unit from the environmental chamber and heat the IC with a heat gun. Vary the load current as instructed in step 5 to test for any oscillations. Once the minimum capacitor value with the maximum ESR is found, a safety factor should be added to allow for the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic capacitors have a tolerance of +/- 20% so the minimum value found should be increased by at least 50% to allow for this tolerance plus the variation which will occur at 6 low temperatures. The ESR of the capacitor should be less than 50% of the maximum allowable ESR found in step 3 above. Calculating Power Dissipation in a Single Output Linear Regulator The maximum power dissipation for a single output regulator (Figure 1) is: PD(max)={VIN(max)VOUT(min)}IOUT(max)+VIN(max)IQ (1) where VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current for the application, and IQ is the quiescent current the regulator consumes at IOUT(max). Once the value of PD(max) is known, the maximum permissible value of RQJA can be calculated: RQJA = 150C - TA PD (2)
The value of RQJA can then be compared with those in the package section of the data sheet. Those packages with RQJA's less than the calculated value in equation 2 will keep the die temperature below 150C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required.
IIN VIN
Smart Regulator
IOUT VOUT
}
Control Features
IQ
Figure 1: Single output regulator with key performance parameters labeled.
CS8129
Application Notes: continued Heat Sinks A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RQJA. RQJA = RQJC + RQCS + RQSA (3) where RQJC = the junctiontocase thermal resistance, RQCS = the casetoheatsink thermal resistance, and RQSA = the heatsinktoambient thermal resistance. RQJC appears in the package section of the data sheet. Like RQJA, it too is a function of package type. RQCS and RQSA are functions of the package type, heatsink and the interface between them. These values appear in heat sink data sheets of heat sink manufacturers.
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CS8129
Package Specification
PACKAGE DIMENSIONS IN mm (INCHES) PACKAGE THERMAL DATA
D Lead Count 16 L SOIC Wide Metric Max Min 10.50 10.10 English Max Min .413 .398
Thermal Data RQJC RQJA typ typ
16 Lead SOIC Wide 23 105
5 Lead TO-220 2.1 uC/W 50 uC/W
Surface Mount Wide Body (DW); 300 mil wide
5 Lead TO-220 (THA) Horizontal
4.83 (.190) 10.54 (.415) 9.78 (.385) 1.40 (.055) 3.96 (.156) 3.71 (.146) 1.14 (.045) 4.06 (.160)
7.60 (.299) 7.40 (.291)
10.65 (.419) 10.00 (.394)
2.87 (.113) 2.62 (.103)
6.55 (.258) 5.94 (.234)
14.99 (.590) 14.22 (.560)
0.51 (.020) 0.33 (.013)
1.27 (.050) BSC
2.77 (.109)
2.49 (.098) 2.24 (.088)
6.83 (.269)
2.65 (.104) 2.35 (.093)
0.81(.032) 1.68 (.066) TYP 1.70 (.067) 6.81(.268) 0.56 (.022) 0.36 (.014) 6.60 (.260) 5.84 (.230) 2.92 (.115) 2.29 (.090)
1.27 (.050) 0.40 (.016)
REF: JEDEC MS-013
0.32 (.013) 0.23 (.009) D 0.30 (.012) 0.10 (.004)
5 Lead TO-220 (T) Straight
10.54 (.415) 9.78 (.385) 2.87 (.113) 6.55 (.258) 2.62 (.103) 5.94 (.234)
4.83 (.190) 4.06 (.160) 3.96 (.156) 3.71 (.146)
1.40 (.055) 1.14 (.045)
5 Lead TO-220 (TVA) Vertical
4.83 (.190) 4.06 (.160) 10.54 (.415) 9.78 (.385) 3.96 (.156) 3.71 (.146)
1.40 (.055) 1.14 (.045)
14.99 (.590) 14.22 (.560)
6.55 (.258) 5.94 (.234) 2.87 (.113) 2.62 (.103) 14.99 (.590) 14.22 (.560)
14.22 (.560) 13.72 (.540)
1.78 (.070) 2.92 (.115) 2.29 (.090)
1.02 (.040) 0.76 (.030)
8.64 (.340) 7.87 (.310) 0.56 (.022) 0.36 (.014)
4.34 (.171) 7.51 (.296) 1.68 (.066) typ 6.80 (.268)
1.02(.040) 0.63(.025) 6.93(.273) 6.68(.263)
1.83(.072) 1.57(.062)
0.56 (.022) 0.36 (.014) 2.92 (.115) 2.29 (.090)
1.70 (.067)
.94 (.037) .69 (.027)
Ordering Information
Part Number CS8129YDW16 CS8129YDWR16 CS8129YT5 CS8129YTHA5 CS8129YTVA5
Rev. 3/31/99
Description 16 Lead SOIC Wide 16 Lead SOIC Wide (tape & reel) 5 Lead TO-220 Straight 5 Lead TO-220 Horizontal 5 Lead TO-220 Vertical 8
Cherry Semiconductor Corporation reserves the right to make changes to the specifications without notice. Please contact Cherry Semiconductor Corporation for the latest available information.
(c) 1999 Cherry Semiconductor Corporation

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